Kevin Karhan :verified:<p><span class="h-card" translate="no"><a href="https://uwu.social/@koakuma" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>koakuma</span></a></span> <span class="h-card" translate="no"><a href="https://woof.tech/@techokami" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>techokami</span></a></span> also <a href="https://infosec.space/tags/UltraSparcT2" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>UltraSparcT2</span></a> as cool as it was at release (including dual 10Gbit-NICs and hardware RNG on die) has a lot of things noone would want to deal with in 2024 (i.e. DDR2-FBDIMMs).</p><ul><li>Plus <a href="https://infosec.space/tags/RISCv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCv</span></a> unlike <a href="https://infosec.space/tags/SPARCv9" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SPARCv9</span></a> amd <a href="https://infosec.space/tags/OpenPOWER" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenPOWER</span></a> was designed on a clean slate in academia by people who had dealt with <a href="https://infosec.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> & <a href="https://infosec.space/tags/CISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CISC</span></a> architectures and needed something <a href="https://infosec.space/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> as they can't just violate NDAs nilly-willy for teaching.</li></ul><p>Pretty shure <span class="h-card" translate="no"><a href="https://mastodon.social/@stman" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>stman</span></a></span> could write an entire curriculum on why <a href="https://infosec.space/tags/SPARC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>SPARC</span></a>, <a href="https://infosec.space/tags/PowerPC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>PowerPC</span></a>, <a href="https://infosec.space/tags/s390x" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>s390x</span></a> and even <a href="https://infosec.space/tags/ARM" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM</span></a> / <a href="https://infosec.space/tags/ARM64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARM64</span></a> should not be pursued and why <a href="https://infosec.space/tags/mc68k" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>mc68k</span></a> died alongside the unfixable-by-design mess that is <a href="https://infosec.space/tags/ix86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ix86</span></a> & <a href="https://infosec.space/tags/amd64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>amd64</span></a>.</p><ul><li>Plus RISCv's ISA has been an <a href="https://infosec.space/tags/OpenStandard" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenStandard</span></a> from the get go, whereas the efforts by <a href="https://infosec.space/tags/Oracle" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Oracle</span></a> nee <a href="https://infosec.space/tags/Sun" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Sun</span></a> and <a href="https://infosec.space/tags/IBM" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>IBM</span></a> were mostly done in reaction to it and to keep the few invested licensees and co-designers onboard and not drop the platform entirely...</li></ul><p>Look, I'd love to get my hands on some Sun SPARC Hardware but aside from making my room hot and noisy there isn't much to justify blowing likely over half a Euro per hour (electricity price: € 0,40/kWh) just to have it up and running, as compared to a <a href="https://infosec.space/tags/PiCluster" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>PiCluster</span></a> like those <span class="h-card" translate="no"><a href="https://mastodon.social/@geerlingguy" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>geerlingguy</span></a></span> had built multiple times are more practical.</p><ul><li>For comparison: It's like driving a 2011 Ford CVPI-71 with a 11,9l SONNY'S SAR-729 engine for commuting from Leverkusen to Köln when there's ample of affordable, reliable and fast public transport that gets me faster from Opladen to Deutz than it takes to drive up the 15th deck of a parking garage just to find a spot to park that 5,7m long street yacht where one can climb out of it from the doors and not the trunk!</li></ul><p>And that's just bottom-billing, low-cost ARM SoC tech designed for a price tag (to the point that until the <a href="https://infosec.space/tags/Pi5" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Pi5</span></a> they neither included a power button nor <a href="https://infosec.space/tags/RTC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RTC</span></a> onboard!</p><ul><li>OFC RISC-V is still 5-25+ years behind <a href="https://infosec.space/tags/ARMv9" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ARMv9</span></a> solely based off <a href="https://infosec.space/tags/patents" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>patents</span></a>, <a href="https://infosec.space/tags/budget" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>budget</span></a> and <a href="https://infosec.space/tags/PersonnelHours" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>PersonnelHours</span></a> invested in it, so it's barely getting on-par with 10-20yr old ARM devices in terms.of power and support.</li></ul>